The digital conception of sigma-delta D/A converter implemented into FPGA

56 K O M U N I K Á C I E / C O M M U N I C A T I O N S 2 / 2 0 0 0 Č/A prevodníky sú technické zariadenia, ktoré umožňujú vzájomnú komunikáciu medzi diskrétnymi a spojitými systémami. Ich základná funkcia je výstižne obsiahnutá vo výroku „Č/A prevodníky tvoria most medzi číslicovým a analógovým svetom“. Č/A prevodníky transformujú diskrétny signál, postupnosť binárnych čísiel na analógový ekvivalent. Len veľmi ťažko si dnes vieme predstaviť realizáciu číslicových riadiacich systémov a niektoré aplikácie číslicového spracovania signálov bez ich využitia. Autori príspevku predkladajú číslicovú koncepciu sigmadelta Č/A prevodníka, ktorý je kompletne implementovaný do programovateľného logického obvodu typu FPGA XC 4005E. Predkladaná koncepcia sigma-delta Č/A prevodníka vyžaduje minimálne prídavné obvody, dolnopriepustný filter, pozostávajúci iba z jedného rezistora a kapacitora. Kľúčové slová: SD Č/A prevodník, FPGA, dolnopriepustný filter, tvarovací obvod 0-tého rádu.


Úvod
Proces Č/A prevodu je možné opísať vzťahom medzi postupnosťou vstupných vzoriek diskrétneho signálu x(n) a zodpovedajúcim spojitým signálom x(t). Ak predpokladáme, že požadovaný spojitý signál je frekvenčne ohraničený frekvenciou f max , potom je ho možné získať z postupnosti vzoriek x(nT S ) na základe známej Shannonovej interpolačnej formuly: pričom interpolačná funkcia g(t) je v tvare: kde D/A converters are technical means which allow mutual communication between discrete and analog systems. Then base function is accurately comprehended in the statement "D/A converters create bridge between digital and analog world". D/A converter transforms the discrete signal, progression of the binary numbers to the analog equivalent.
Nowadays it is difficult to imagine realization of the digital control systems and some applications of the digital signal processing without using them.

Introduction
The Process of D/A conversion can be described by the relation between the progression input samples x(n) and corresponding analog signal x(t). If we suppose that the required analog signal is limited by the frequency f max , then we take it from the progression of the samples x(nT S ) on the base of the well known the Shannon interpolation formula: whereby interpolation function g(t) is in the form: where Poznamenajme, že v uvedenom prípade sa stretávame s nekauzálnym IIR filtrom, ktorého priama realizácia nie je možná. V praktických aplikáciách sa preto pri realizácii Č/A prevodníkov stretávame s jednoduchšími prístupmi. Najčastejšie sa používajú Č/A prevodníky s tvarovačom 0-tého rádu. Výstup tvarovacieho obvodu (S/H) je ďalej upravený dolnopriepustným filtrom. Štruktúra Č/A prevodníka je uvedená na obr. 2.
Process of an ideal conversion can be understood as a process of the filtering in which we try to supress all frequency components out of the frequency range Ϫ f max to f max .
Interpolation function g(t) then represents the impulse response of the lowpass filter with frequency characteristic depicted in Fig. 1.
In this case we use a non causal IIR filter whose direct realization is impossible. In the design and realization of the D/A converters we have more simple approaches to the practical application. D/A converters with a zero order hold circuit (S/H) are frequently used. Output of the S/H is further formed by the lowpass filter. The structure of the D/A converter is depicted in Fig.2.
It is possible to express the impulse response of the S/H by the following: It is possible to determine the frequency response of the S/H from the impulse response by the application of Fourier transformation: The amplitude frequency characteristic is depicted in Fig. 3.
The difference between the frequency characteristic of an ideal D/A converter (Fig. 1) and a D/A converter realized on the base of the S/H is quite significant.
The presence of the higher frequency components contained in the analog signal is given by the ripple of the frequency characteristic above the frequency F Ͼ 1/2T S (stop band). These undesirable higher frequency components can be eliminated by an analog lowpass filter.
In the design and realization of the D/A converters on the base of the S/H , higher order hold circuits are used, but without a remarkable improvement of the qualities of the D/A converters.

D/A Converter on the base of the S-D modulatro
Sigma -delta modulator transforms progression of the samples {y(m)} into bi-level signal z(t). The bi-level signal z(t) goes through an analog lowpass filter which eliminates the influence of undesirable frequency components. The principle of the function is depicted in Fig. 4.
Progression {v(m)} inputs into digital lowpass filter LPF1 which eliminates frequency components above the frequency /I. The output signal of the lowpass filter, progression {y(m)}, is modulated by the sigma-delta modulator to the bi-level time continuous signal z(t). The signal z(t) is being modified by the analog lowpass filter LPF2 to the form of the continuous equivalent of the discrete signal x(n). We notice that a digital lowpass filter works with I-times higher the sampling frequency than is sampling frequency of the discrete input signal x(n). We endeavour to find the most simple implementation of the filter because of having in mind the technical realization.
The solving of the SD D/A converter is described in the following part of the article. The SD D/A converter is designed and implemented as a pure digital system with a zero order hold circuit.

Architecture of the digital sigma -delta D/A converter
The herein presented SD D/A converter is designed as a digital system implemented in a reprogrammable logic device, Field Programmable Gate Array (FPGA) XC 4005E. The block scheme of the implemented system with interface signals is depicted in Fig. 5. where: DAC OUT -output signal, pulse string, that drives the external lowpass filter DAC IN -digital input bus CLK -system input clocks Reset -initializes system Ako je zrejmé z obr. 7, systém priamej číslicovej frekvenčnej syntézy je realizovaný akumulátorom.
The digital conception of the SD A/D converter significantly eliminates the influence of temperature on its function. The structure of the SD A/D converter is depicted in Fig. 6.
The core of the SD D/A converter consists of the Sigma Adder and Sigma Latch register, which, in the described function connection works as a Direct Digital Frequency Synthesis (DDFS). Its common block diagram is depicted in Fig. 7.
As we can see in Fig. 7 the system DDFS is, in fact, an accumulator. The frequency of the output signal (bit MSB of the Sigma Latch register) of the system DDFS is controlled by the value of the binary constant N placed on one of the inputs of the summator. The frequency FOUT is given by the following equation: where k is a number of bits of the feedback bus N is a control binary constant in the input of the summator F CLK is frequency of the systems clock The frequency of the output signal can be changed with a resolution step 2 Ϫk .
There is a limitation of the frequency of the output signal according to the following equation (8):

Functional parameters of the digital SD D/A converter
The described SD D/A converter is completely designed as a digital system and is implemented in FPGA XC 4005E. The advantages of using FPGA are: no dependence on temperature, voltage or aging and accuracy of the external analog components.

Recenzenti: J. Mintal, M. Hrianka
The output voltage of the SD D/A converter For the implementation in Fig. 6, the output voltage V OUT as a function of the SD D/A converter input may be expressed as follows: where: V OUT is an output voltage on the lowpass filter output, analog equivalent of the binary value of the input sample ͗DAC IN ͘ contents of the input bus MSBI the most significant bit of the input sample

The time of the conversion
The time of the conversion of the SD D/A converter is in this case expressed as follows: Where T CLK is a period of the system clock.
In the case of an 8-bit input sample and CLK frequency 50 MHz is a time of the conversion 5.12 s.
The presented SD D/A converter has universal applications in the areas where it satisfies the criteria of the conversion speed. The following applications can be introduced: G Programmable Voltage Generator G Waveform Generator G Sound Generator G RGB Color Generator

Conclusion
Digital Sigma -Delta D/A converter is one of the examples how the reprogrammable logic devices FPGAs can be effectively used in applications, where analog circuits dominated until recently. The density and speed of today's FPGAs circuits make them ideal for implementation of a wide range of very vast digital systems working on the frequency up to 350MHz. The unneglectible aspect of the introduced conception of the SD D/A converter is a reduction of the system components with direct consequences on the raising of the system reliability.