ALLPASS BASED ON A GENERALIZED DIVIDER PRINCIPLE ALLPASS BASED ON A GENERALIZED DIVIDER PRINCIPLE

There are many ways how to realize the transfer function (1). Remember that passive realization of the group-delay equalizer is usually based on the 1or 2-order lattice and their unsymmetrical equivalent circuits – see [1], [2]. In the field of active RC circuits are well-known implementations using a single-amplifier circuit or universal biquad configurations as mentioned in [3], [4], [5] and others. The first group of circuits suffers from inappropriate sensitivity to the element value variations and amplifier non-idea0 a1s s2s 2 ... ( 1)ans n


Introduction
All-pass filters represent a meaningful part of modern communication systems, making possible equalization of signal chain group-delay. This is important especially in the case of the datasignal or video-signal processing. As known, the basic properties of the all-pass filters are determined by all-pass transfer function (1) With respect to the stability condition, the polynomial v(s) has to be a Hurwitz polynomial. It is easy to derive that the transfer function (1) corresponds to the non-minimal phase circuit whose magnitude frequency response is frequency independent, determined by a multiplicative factor h. Phase response can be expressed in the form (2) where N(Ϫ 2 ) … represents an odd part of the polynomial v(j) and M(Ϫ 2 ) … represents an even part of v(j).
The group delay () is defined by the known formula There are many ways how to realize the transfer function (1). Remember that passive realization of the group-delay equalizer is usually based on the 1 st -or 2 nd -order lattice and their unsymmetrical equivalent circuits -see [1], [2]. In the field of active RC circuits are well-known implementations using a single-amplifier circuit or universal biquad configurations as mentioned in [3], [4], [5] and others. The first group of circuits suffers from inappropriate sensitivity to the element value variations and amplifier non-ide-a 0 Ϫ a 1 s ϩ s 2 s 2 Ϫ … ϩ (Ϫ1 n )a n s n ᎏᎏᎏᎏ a 0 ϩ a 1 s ϩ a 2 s 2 ϩ … ϩ a n s n alities. At the same time, a parameter setting is rather complicated and does not allow simple tuning. The second group shows better sensitivity properties, but negative odd numerator coefficients are obtained as a difference of positive and negative terms. With respect to this, such a circuit is sensitive to the perfect setting and amplifier non-idealities. The mentioned circuits usually show a magnitude frequency response distortion which is caused by coefficient errors, or, in other words, by errors of transfer function pole-zero location.
To find a more suitable solution, a considerable effort has been devoted to the search for a new circuit implementation of the allpass transfer function. As shown in the following section, one of the possible ways is based on a suitable application of a generalized divider principle.

A generalized divider
In Ref. [6] we have presented a universal filter structure based on a generalized divider principle. The basic arrangement of the mentioned structure is shown in Fig. 1. The "black boxes" marked as GIC correspond to the generalized immitance converters characterized by the 1 st -order conversion function k i (s) ϭ k i .s , where s denotes complex frequency. Note that such a structure allows realization of any transfer function by appropriate setting of divider branches, as is evident from the corresponding transfer function (4)

ALLPASS BASED ON A GENERALIZED DIVIDER PRINCIPLE ALLPASS BASED ON A GENERALIZED DIVIDER PRINCIPLE
Comparing H(s) to the general transfer function in the polynomial form (5) it is easy to derive formulae for numerator and denominator coefficients as the functions of branch admittances and GICs conversion functions where k i -denotes the conversion-function-multiplicative constant of the i th GIC.
To apply the presented generalized divider structure in the allpass design it is necessary to accept the following restrictions: • The equal values of numerator and denominator coefficients at the same power of s (but, in general, all the numerator coefficients can be multiplied by the transfer multiplicative constant h: The relevant problem can arise in the second condition fulfilment. The original generalized divider structure allows realization of the transfer function containing the positive numerator coefficients only, as is evident from Eq. (4). To obtain the required negative odd coefficients, it is necessary to change the sign of the corresponding branch admittances, or, to use inverted source voltage at the inputs of the upper odd branches. An efficient solution offers the use of the known Antoniou's GIC circuitry -see [4,5]. Let us consider Antoniou's GIC in Fig. 2, whose conversion function is expressed by Eq. (7), and now modify the original circuit by adding the auxiliary port xϪxЈ. An arbitrary loading impedance Z x , connected to the auxiliary port is transformed to the "main" input port 1 Ϫ 1Ј as the negative impedance Z 1Ϫ1Ј , which is presented by the formula (8) a 0 ϩ a 1 s ϩ a 2 s 2 ϩ … ϩ a n s n ᎏᎏᎏ Using this principle it is easy to derive the modified generalized divider structure shown in Fig. 3, convenient to the arbitrary allpass transfer realization. The odd "upper" branch admittances Y 2j, j ϭ 1, 3, 5, … are connected to the auxiliary port of the corresponding odd GICs, and, with respect to the GIC transforming effect, they behave as the negative ones. The equivalent admittance of the modified branch is expressed by the equation (9) where Y 2j(m) -denotes transformed (modified) admittance of j th branch, Z ij -denotes i th impedance of j th GIC circuit (see Fig. 2), Y 2j -denotes the original j th branch admittance.
As evident the converter impedance Z k1 , Z k2 should be of the same type to save the character of the transformed admittance Z x . It is easy to derive; the correct circuit behaviour requires arrangement of GIC circuit elements as follows: The resulting transfer function of the improved circuit structure can be written in the form (11) where ␣ j -expresses the ratio ␣ j ϭ R 2j /R 1j , j ϭ 1, 3, 5, … of i th GIC impedances.
As evident, the odd transfer function coefficients are now expressed in the form (12), while the even coefficients remain unchanged and correspond to the expression (6).
The presented results indicate effective implementation of an arbitrary order allpass transfer function. With respect to the number of circuit elements (divider branches) the structure is canonical.
Note that the special case for the transfer multiplicative constant h ϭ 1 leads to the minimum number elements realization. The absolute value coefficient equivalence compared to the Eqs(6, 12) gives divider branch design conditions It is important to say that the divider principle causes a restriction in transfer multiplicative constant value. The appropriate choice is limited to the unequality h Յ 1 and cannot be exceeded by no means.
In the following the particular cases of the 1 st -and the 2 ndorder allpass circuits will be discussed in detail.

The 1st and 2nd-order allpass
The simpliest version of allpass circuit is presented by 1 st -order divider structure shown in Fig. 4.
The circuit transfer function was found in the form (14) A comparison of the expression (14) to the general form of 1 st -order allpass transfer function (15) leads to the simple design equations (16) ( 1 6 ) Here ᎏ и k 1 , and Y 21 represent free parameters and can be chosen arbitrarily, e.g. with respect to the additional optimized design conditions.
Now, let us devote our attention to the 2 nd -order allpass. The circuit diagram is shown in Fig. 5, GICs are implemented by the mentioned Antoniou's circuitry -see Fig. 2. Circuit symbolic transfer function is expressed in the "standard" form (17) The transfer function coefficients are expressed by the formulae Similarly to the aforementioned 1 st -order case, it is possible to derive design equations of divider branches Y ik i,kϭ1,2 from Eqs. (18). The result is Similarly to the 1 st -order case, the values of Y 22 , k i and ␣ i parameters are free and can be conformed to the optimum design conditions. In accordance with the previous considerations and derived "basic" design formulae (16, 20), the higher-order allpass can be easily created only by adding next branches to the designed circuit.

Optimized design of the 2 nd -order circuit
The presented design equations (20) are fully valid in the case of an idealized circuit, i.e. the circuit containing idealized active elements. As known, especially the influence of amplifier finite frequency dependent gain significantly change the circuit behav- iour, particularly increase the transfer funcion order and vary "main" poles and zeroes location. From this point-of-view, it is advisable to use the free design parameters to minimize the influence of amplifier non-idealities. A detail analysis of this topic was made in [7], in this place the main results will be summarized and optimized design algorithms presented.
Starting from the allpass general biquadratic transfer function H(s) The design optimization conditions include • minimization of p and z errors, • minimization of Q p and Q z errors, • dynamic optimization, i.e. equalization of maximum output voltages of all the amplifiers.
Note that the optimization conditions strongly depend on the amplifiers type used in Antoniou's converter circuitry, as documented in ref. [8]. With respect to the presented results, the transimpedance amplifier (CFOA) has been chosen as the most suitable for voltage-mode design.
The derivation of general optimization conditions requires to express parameters of the main poles and zeroes in symbolic form. But the transfer function of the real circuit is of the 6 th -order, considering simple single-pole models of the amplifiers used. A symbolic evaluation of the main poles and zeroes then presents a dificult mathematical task, which can be solved only approximately, despite the modern mathematical software at disposal. The developed general algorithm is based on order reduction of the transfer function numerator and denominator polynomials neglecting the higherorder error terms. It is formed as follows:

Symbolic transfer function of the real circuit is computed under
consideration of finite, frequency independent amplifier gain.

Numerator and denominator of the obtained symbolic transfer
function is divided by the highest power of amplifier gain: where A -means amplifier gain, m -denotes the highest power of A.
3. All the terms of recalculated numerator and denominator polynomials containing power of A higher than 1 are neglected, i.e.

Gain amplifier symbol A in NЈ(s) and DЈ(s) is replaced by a frequency dependent relationship
where B ϭ A 0 x , and x means dominant pole of amplifier gain frequency response.

Expressions of N
Here Ј 0p , QЈ p represent parameters of "real" main poles, Ј 0z , QЈ z "real" main zeroes. p and z represent auxiliary "equivalent" real pole and zero without any importance for the following optimization procedure.
The third-order polynomial decomposition is possible using mathematical programs, or, in the simplified way using approximate formulae where d 1id ϭ ᎏ where the resulting error of the computed Q parameter is under 1% for ratio B/ 0 Յ 15 .
The necessary circuit symbolic analysis and all the symbolic evaluations including the derivation of symbolic simplified transfer function parameters were made using mathematical program MAPLE V, release 5.
The optimization procedure alone is based on utilization of circuit degrees of freedom given by an additional number of optional circuit elements in comparison to the number of given design parameters. In the considered case, the optimized circuit has eight degrees of freedom, with respect to the six given parameters of the transfer function (21) and 14 optional passive elements. In the following, the procedure will be discussed in detail and the results demonstrated on typical examples.
The basic stage of the optimization procedure includes minimization of the simplified transfer function coefficient errors The symbolic form of coefficient errors (27), evaluated using MAPLE, contains positive and negative terms; i.e. there is possible to set them to zero. As proved in Ref. [7], three of the main errors can be zeroized simultaneously in combinations (28).
Note that the conditions (29) give less applicable results. The first set of conditions leads to the additional design equations for GIC elements in the form (30) The computation was made under choice of k 1 ϭ k 2 ϭ 0 , in conformity with the recommendation published in Ref. [8]. It is important to point out the influence of the non-corrected QЈ zerror, which causes magnitude frequency response distortion in the vicinity of frequency 0 , as will be shown in the numerical example. To avoid this, two ways can be used to the fully correct design: a) A predistortion of Q z value, making final value errorless. This way is simple, because the error ␦(a 1 ) is expressed by formula (31) evaluated under conditions (30). The improved form of design equations then includes the expressions (18) and (19) for transfer function coefficients together with optimization conditions (28). Note that the equation for coefficient a 1 in (18) is modified in the sense of the Q z predistortion to the form (32).
The circuit element design formulae computed by MAPLE give the resulting expressions (33). It is important to say that the "free" optional parameters (R 11 , R 12 ) influence circuit dynamic behaviour and R 31 affects frequency response. Unfortunately, the optimum values of these elements limit to zero and, from practical design point-of-view, their values should be chosen as small as possible.
b) The second way uses modified optimization conditions (28), or (29), which keep the Ј 0p and Ј 0z parameters errorless and make the Q-errors equal, i.e.
To avoid an additional group-delay error at frequency 0 caused by Q-errors, the design can be combined with previously applied predistortion of coefficients a e1 and d e1 .
The corresponding basic set of design equations is shown in (34). 1 As evident from (23), the coefficient errors indirectly express the errors of 0 and Q parameters as well. , A symbolic solution of the Eqs. (34) was made using MAPLE. The free design parameters are the same as in the case a), i. e. Y 22 , R 11 , R 31 and R 12 .
The discussed design procedure will be now demonstrated on the numerical example. Let us consider the frequency normalized allpass transfer function H(s) assigned by parameters h ϭ 1. An obtained circuit analysis confirmed correctness of design procedure and acceptable accuracy of the developed algorithm for transfer function order reduction. The evaluated parameters of the "full" and simplified transfer functions are summarized in the Table 1.
A basic design results Table 1 Function  Table 3. For illustration, the -error frequency response is shown in Fig. 8 and magnitude frequency response in Fig. 9. As it can be observed, the correction of magnitude frequency response is worse in comparison to the class a) design.
Resulting parameters with ae1 predistortion  Comparing the evaluated circuit parameters, it is possible to render some partial conclusions: • Both the class a) versions give similar results. • Sensitivity of transfer function parameters to the amplifier GBW is significantly influenced by suitable chioce of R 31 value. This fact is in agreement with general theory of current-feedback circuits. The lesser value of R 31 makes circuit frequency range wider. • Class b) design leads to a higher sensitivity to the amplifier GBW, which is evident from the comparison of the first parasitic poles of the resulting "full" transfer function, or indirectly, by comparing p values. To improve the frequency properties and gain conformable results, it is necessary to reduce the R 31 value approximately by half.
The higher stage of the optimized design includes additional dynamic optimization in the sense of the equalization of amplifier maximum output voltages. Dynamic analysis disclosed inappropriate overshoot of the fourth amplifier output voltage in the vicinity of frequency ϭ 1 . To improve circuit dynamic properties, the set of design equations was extended about conditions (36) expressing the request of equal amplifier output voltages at frequency 0 Here Mod Ai ( 0 ), i ϭ 1, 2, 3, 4 expresses symbolically evaluated modul of partial transfer function corresponding to the amplifier outputs at frequency 0 .
A solution of the extended design equations provided the following results: • The "full" set of equations containing Eqs. (33) and the additional dynamic conditions (36) is unsolvable, the requests to the 0 -and Q-errors minimization negate dynamic equalization. • The full dynamic optimization allows only 0z -error zeroing, the remaining errors are uncorrected. These can be minimized by a suitable choice of the optional value of R 32 , limit value is R 32 → 0. • Compromise solution including 0p and 0z errors zeroing and partial dynamic equalization seems to be the most acceptable. Optimum results were achieved considering conditions Mod A1 ( 0 ) ϭ Mod A3 ( 0 ) ϭ Mod A4 ( 0 ) .
Maximum output voltage of the 2 nd amplifier is in this case lower than in others. • In general, dynamic optimization deteriorates frequency properties and leads to the higher errors of resulting group-delay and magnitude frequency responses. A fully acceptable solution is achievable using a more sophisticated optimization strategy, e.g. using evolutionary algorithms, or using a current-mode design.
A numerical illustration of the results obtained by using a compromise design is shown in table 4. Here the optional parameters were chosen R 31 ϭ 0.125, R 32 ϭ 0.75 and Y 22 ϭ 1.0. Note that the ratio R 32 /R 31 influences circuit frequency properties and the chosen value corresponds to the local optimum. The calculated dynamic overshoots attain to ϩ13.5 dB. An additional predistortion of transfer function improving the final parameters was not made, but it would be possible. Fig. 10 illustrates the results of the equalization of the amplifier maximum output voltages. As evident, the simplified approach gives acceptable accuracy of the dynamic optimization.

Conclusions
The aim of this paper is to mention a new possibility of the allpass design. The described circuit is original, gained by the modification of the earlier published general divider structure. The use of CFOA warrants a wide frequency range, acceptable for design of phase equalizers in video-or fast-data-signal processing systems. The developed design procedures give improved solutions without noticeable group-delay and magnitude frequency response errors.
At this moment multicriterial optimization including circuit dynamics is not fully solved. This problem is a topic of the future research and its solution is posible using a current-mode design or by application of other variants of GIC circuits, e.g. GICs based on current conveyors. Circuit parameters for the compromise design