PT Journal
AU Svarna, V
   Frivaldsky, M
TI Evaluation of Silicone Carbide Mosfet Driving Circuit Performance
SO Communications - Scientific Letters of the University of Zilina
PY 2025
DI 10.26552/com.C.2025.047
WP https://komunikacie.uniza.sk/artkey/csl-000000-2515.php
DE silicon carbide; power transistor; driving circuit; double pulse test; energy losses
SN 13354205
AB The performances of different driving circuits configurations designed for silicon carbide MOSFET transistors are compared in this research. The simulation of the double-pulse test (DPT) was performed with the use of three driving circuit configurations. The SiC MOSFET NTH4L022N120M3S has great dynamic parameters, which made it suitable for the DPT simulation. It was performed with six different driving voltage ranges, all within the range between -10 V and 20 V. The results were taken across the wide range of driving resistances placed between the driver and the SiC MOSFET, where the switching losses were taken. Drawing from the observed measurements and derived plots, the optimal UGS driving interval for managing the SiC MOSFET transistor is determined to be -10 V/20 V when using a circuit design that incorporates both turn-on and turn-off resistors and diodes.
ER